22 #ifndef VMCS_INTEL_X64_HOST_VM_STATE_H 23 #define VMCS_INTEL_X64_HOST_VM_STATE_H 74 {
return m_gdt.
base(); }
76 {
return m_idt.
base(); }
79 {
return m_gdt.
limit(); }
81 {
return m_idt.
limit(); }
84 {
return m_es_index != 0 ? m_gdt.
limit(m_es_index) : 0; }
86 {
return m_cs_index != 0 ? m_gdt.
limit(m_cs_index) : 0; }
88 {
return m_ss_index != 0 ? m_gdt.
limit(m_ss_index) : 0; }
90 {
return m_ds_index != 0 ? m_gdt.
limit(m_ds_index) : 0; }
92 {
return m_fs_index != 0 ? m_gdt.
limit(m_fs_index) : 0; }
94 {
return m_gs_index != 0 ? m_gdt.
limit(m_gs_index) : 0; }
96 {
return m_ldtr_index != 0 ? m_gdt.
limit(m_ldtr_index) : 0; }
98 {
return m_tr_index != 0 ? m_gdt.
limit(m_tr_index) : 0; }
118 {
return m_es_index != 0 ? m_gdt.
base(m_es_index) : 0; }
120 {
return m_cs_index != 0 ? m_gdt.
base(m_cs_index) : 0; }
122 {
return m_ss_index != 0 ? m_gdt.
base(m_ss_index) : 0; }
124 {
return m_ds_index != 0 ? m_gdt.
base(m_ds_index) : 0; }
126 {
return m_fs_index != 0 ? m_gdt.
base(m_fs_index) : 0; }
128 {
return m_gs_index != 0 ? m_gdt.
base(m_gs_index) : 0; }
130 {
return m_ldtr_index != 0 ? m_gdt.
base(m_ldtr_index) : 0; }
132 {
return m_tr_index != 0 ? m_gdt.
base(m_tr_index) : 0; }
135 {
return m_ia32_debugctl_msr; }
137 {
return m_ia32_pat_msr; }
139 {
return m_ia32_efer_msr; }
141 {
return m_ia32_perf_global_ctrl_msr; }
143 {
return m_ia32_sysenter_cs_msr; }
145 {
return m_ia32_sysenter_esp_msr; }
147 {
return m_ia32_sysenter_eip_msr; }
149 {
return m_ia32_fs_base_msr; }
151 {
return m_ia32_gs_base_msr; }
155 bfdebug <<
"----------------------------------------" << bfendl;
156 bfdebug <<
"- vmcs_intel_x64_host_vm_state dump -" << bfendl;
157 bfdebug <<
"----------------------------------------" << bfendl;
160 bfdebug <<
"segment selectors:" << bfendl;
171 bfdebug <<
"segment base:" << bfendl;
182 bfdebug <<
"segment limit:" << bfendl;
193 bfdebug <<
"segment acess rights:" << bfendl;
204 bfdebug <<
"registers:" << bfendl;
211 bfdebug <<
"flags:" << bfendl;
215 bfdebug <<
"gdt/idt:" << bfendl;
222 bfdebug <<
"model specific registers:" << bfendl;
223 bfdebug <<
" - m_ia32_debugctl_msr: " <<
view_as_pointer(m_ia32_debugctl_msr) << bfendl;
224 bfdebug <<
" - m_ia32_pat_msr: " <<
view_as_pointer(m_ia32_pat_msr) << bfendl;
225 bfdebug <<
" - m_ia32_efer_msr: " <<
view_as_pointer(m_ia32_efer_msr) << bfendl;
226 bfdebug <<
" - m_ia32_perf_global_ctrl_msr: " <<
view_as_pointer(m_ia32_perf_global_ctrl_msr) << bfendl;
227 bfdebug <<
" - m_ia32_sysenter_cs_msr: " <<
view_as_pointer(m_ia32_sysenter_cs_msr) << bfendl;
228 bfdebug <<
" - m_ia32_sysenter_esp_msr: " <<
view_as_pointer(m_ia32_sysenter_esp_msr) << bfendl;
229 bfdebug <<
" - m_ia32_sysenter_eip_msr: " <<
view_as_pointer(m_ia32_sysenter_eip_msr) << bfendl;
230 bfdebug <<
" - m_ia32_fs_base_msr: " <<
view_as_pointer(m_ia32_fs_base_msr) << bfendl;
231 bfdebug <<
" - m_ia32_gs_base_msr: " <<
view_as_pointer(m_ia32_gs_base_msr) << bfendl;
gdt_x64::integer_pointer gdt_base() const override
void dump() const override
gdt_x64::access_rights_type cs_access_rights() const override
x64::rflags::value_type rflags() const override
intel_x64::cr4::value_type cr4() const override
x64::segment_register::type fs() const override
intel_x64::msrs::value_type ia32_sysenter_esp_msr() const override
gdt_x64::base_type tr_base() const override
access_rights_type access_rights(index_type index) const
gdt_x64::limit_type tr_limit() const override
intel_x64::msrs::value_type ia32_sysenter_cs_msr() const override
gdt_x64::limit_type ldtr_limit() const override
x64::segment_register::type tr() const override
gdt_x64::access_rights_type ss_access_rights() const override
gdt_x64::limit_type es_limit() const override
x64::segment_register::type ldtr() const override
gdt_x64::size_type gdt_limit() const override
intel_x64::msrs::value_type ia32_gs_base_msr() const override
gdt_x64::base_type ldtr_base() const override
gdt_x64::access_rights_type fs_access_rights() const override
constexpr const auto unusable
idt_x64::size_type idt_limit() const override
gdt_x64::access_rights_type es_access_rights() const override
gdt_x64::access_rights_type tr_access_rights() const override
gdt_x64::base_type es_base() const override
x64::segment_register::type ds() const override
intel_x64::msrs::value_type ia32_sysenter_eip_msr() const override
uintptr_t integer_pointer
intel_x64::msrs::value_type ia32_efer_msr() const override
gdt_x64::base_type fs_base() const override
intel_x64::msrs::value_type ia32_pat_msr() const override
uint32_t access_rights_type
intel_x64::cr3::value_type cr3() const override
gdt_x64::base_type ds_base() const override
x64::segment_register::type es() const override
gdt_x64::access_rights_type gs_access_rights() const override
const void * view_as_pointer(const T val)
gdt_x64::base_type gs_base() const override
vmcs_intel_x64_host_vm_state()
intel_x64::cr0::value_type cr0() const override
gdt_x64::limit_type fs_limit() const override
gdt_x64::base_type cs_base() const override
gdt_x64::access_rights_type ds_access_rights() const override
gdt_x64::access_rights_type ldtr_access_rights() const override
integer_pointer base() const
~vmcs_intel_x64_host_vm_state() override=default
gdt_x64::base_type ss_base() const override
intel_x64::msrs::value_type ia32_fs_base_msr() const override
idt_x64::integer_pointer idt_base() const override
intel_x64::msrs::value_type ia32_debugctl_msr() const override
x64::segment_register::type gs() const override
intel_x64::msrs::value_type ia32_perf_global_ctrl_msr() const override
uintptr_t integer_pointer
x64::segment_register::type cs() const override
x64::segment_register::type ss() const override
x64::dr7::value_type dr7() const override
gdt_x64::limit_type ss_limit() const override
gdt_x64::limit_type ds_limit() const override
gdt_x64::limit_type gs_limit() const override
gdt_x64::limit_type cs_limit() const override