vmcs_intel_x64_host_vm_state.cpp
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1 //
2 // Bareflank Hypervisor
3 //
4 // Copyright (C) 2015 Assured Information Security, Inc.
5 // Author: Rian Quinn <quinnr@ainfosec.com>
6 // Author: Brendan Kerrigan <kerriganb@ainfosec.com>
7 //
8 // This library is free software; you can redistribute it and/or
9 // modify it under the terms of the GNU Lesser General Public
10 // License as published by the Free Software Foundation; either
11 // version 2.1 of the License, or (at your option) any later version.
12 //
13 // This library is distributed in the hope that it will be useful,
14 // but WITHOUT ANY WARRANTY; without even the implied warranty of
15 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 // Lesser General Public License for more details.
17 //
18 // You should have received a copy of the GNU Lesser General Public
19 // License along with this library; if not, write to the Free Software
20 // Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
21 
23 
24 #include <intrinsics/msrs_x64.h>
26 #include <intrinsics/cpuid_x64.h>
27 
28 using namespace x64;
29 using namespace intel_x64;
30 using namespace cpuid;
31 
33  m_gdt{},
34  m_idt{}
35 {
36  m_es = segment_register::es::get();
37  m_cs = segment_register::cs::get();
38  m_ss = segment_register::ss::get();
39  m_ds = segment_register::ds::get();
40  m_fs = segment_register::fs::get();
41  m_gs = segment_register::gs::get();
42  m_ldtr = segment_register::ldtr::get();
43  m_tr = segment_register::tr::get();
44 
45  m_es_index = segment_register::es::index::get();
46  m_cs_index = segment_register::cs::index::get();
47  m_ss_index = segment_register::ss::index::get();
48  m_ds_index = segment_register::ds::index::get();
49  m_fs_index = segment_register::fs::index::get();
50  m_gs_index = segment_register::gs::index::get();
51  m_ldtr_index = segment_register::ldtr::index::get();
52  m_tr_index = segment_register::tr::index::get();
53 
54  m_cr0 = cr0::get();
55  m_cr3 = cr3::get();
56  m_cr4 = cr4::get() | cr4::vmx_enable_bit::mask;
57  m_dr7 = dr7::get();
58 
59  m_rflags = rflags::get();
60 
61  m_ia32_debugctl_msr = intel_x64::msrs::ia32_debugctl::get();
62  m_ia32_pat_msr = x64::msrs::ia32_pat::get();
63  m_ia32_efer_msr = intel_x64::msrs::ia32_efer::get();
64 
65  if (arch_perf_monitoring::eax::version_id::get() >= 2)
66  m_ia32_perf_global_ctrl_msr = intel_x64::msrs::ia32_perf_global_ctrl::get();
67 
68  m_ia32_sysenter_cs_msr = intel_x64::msrs::ia32_sysenter_cs::get();
69  m_ia32_sysenter_esp_msr = intel_x64::msrs::ia32_sysenter_esp::get();
70  m_ia32_sysenter_eip_msr = intel_x64::msrs::ia32_sysenter_eip::get();
71  m_ia32_fs_base_msr = intel_x64::msrs::ia32_fs_base::get();
72  m_ia32_gs_base_msr = intel_x64::msrs::ia32_gs_base::get();
73 }
auto get() noexcept
Definition: msrs_x64.h:53
constexpr const auto mask
Definition: cpuid_x64.h:85
Definition: cache_x64.h:31